Large variations in capacitive and/or current loading conditions of amplifiers or regulators, e.g., low-dropout (LDO) regulators, typically result in loss of stability in a close-loop system, which causes unwanted oscillations at an output and thus failure of functionality. In one exemplary application such as back-bias drivers used to reduce a chip overall power consumption, the loading conditions may not be rigidly defined upfront and could vary several orders of magnitude over the chip operating modes. Under such conditions implementation of compensation schemes reliant on a feedback loop pole-zero movement becomes problematic. In some cases, methods are implemented by tracking and compensating unwanted (e.g., high-order) poles in a loop transfer function by corresponding introduced zeros in a certain frequency range, so as to maintain a sufficient close-loop phase margin to avoid negative feedback turning positive where loop gain is greater than unity. However, such methods may become ineffective where the close-loop system parasitic pole variability is either too large or not known upfront, or is difficult to constrain.